TIPD115: ADC, 18bit, 1Msps, Low Noise Optimized

This design is for an 18-bit data acquisition block at 1MSPS throughput optimized for the lowest distortion and noise performance. The circuit is realized with an 18-bit successive-approximation-resistor (SAR) analog-to-digital converter (ADC), a fully differential input driver and a high precision reference and reference driver. The design details the process for optimizing the precision front end drive circuit as well as the reference circuit to achieve excellent dynamic performance with the ADS8881 while consuming low power.